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  1. general description the PCA9685 is an i 2 c-bus controlled 16-channel led controller optimized for lcd red/green/blue/amber (rgba) color backlighting applications. each led output has its own 12-bit resolution (4096 steps) ?xed frequency individual pwm controller that operates at a programmable frequency from a typical of 40 hz to 1000 hz with a duty cycle that is adjustable from 0 % to 100 % to allow the led to be set to a speci?c brightness value. all outputs are set to the same pwm frequency. each led output can be off or on (no pwm control), or set at its individual pwm controller value. the led output driver is programmed to be either open-drain with a 25 ma current sink capability at 5 v or totem pole with a 25 ma sink, 10 ma source capability at 5 v. the PCA9685 operates with a supply voltage range of 2.3 v to 5.5 v and the inputs and outputs are 5.5 v tolerant. leds can be directly connected to the led output (up to 25 ma, 5.5 v) or controlled with external drivers and a minimum amount of discrete components for larger current or higher voltage leds. the PCA9685 is in the new fast-mode plus (fm+) family. fm+ devices offer higher frequency (up to 1 mhz) and more densely populated bus operation (up to 4000 pf). although the pca9635 and PCA9685 have many similar features, the PCA9685 has some unique features that make it more suitable for applications such as lcd backlighting and ambilight: ? the PCA9685 allows staggered led output on and off times to minimize current surges. the on and off time delay is independently programmable for each of the 16 channels. this feature is not available in pca9635. ? the PCA9685 has 4096 steps (12-bit pwm) of individual led brightness control. the pca9635 has only 256 steps (8-bit pwm). ? when multiple led controllers are incorporated in a system, the pwm pulse widths between multiple devices may differ if pca9635s are used. the PCA9685 has a programmable prescaler to adjust the pwm pulse widths of multiple devices. ? the PCA9685 has an external clock input pin that will accept user-supplied clock (50 mhz max.) in place of the internal 25 mhz oscillator. this feature allows synchronization of multiple devices. the pca9635 does not have external clock input feature. ? like the pca9635, PCA9685 also has a built-in oscillator for the pwm control. however, the frequency used for pwm control in the PCA9685 is adjustable from about 40 hz to 1000 hz as compared to the typical 97.6 khz frequency of the pca9635. this allows the use of PCA9685 with external power supply controllers. all bits are set at the same frequency. ? the power-on reset (por) default state of ledn output pins is low in the case of PCA9685. it is high for pca9635. PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller rev. 02 16 july 2009 product data sheet
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 2 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller the active low output enable input pin ( oe) allows asynchronous control of the led outputs and can be used to set all the outputs to a de?ned i 2 c-bus programmable logic state. the oe can also be used to externally pulse width modulate the outputs, which is useful when multiple devices need to be dimmed or blinked together using software control. software programmable led all call and three sub call i 2 c-bus addresses allow all or de?ned groups of PCA9685 devices to respond to a common i 2 c-bus address, allowing for example, all red leds to be turned on or off at the same time or marquee chasing effect, thus minimizing i 2 c-bus commands. six hardware address pins allow up to 62 devices on the same bus. the software reset (swrst) general call allows the master to perform a reset of the PCA9685 through the i 2 c-bus, identical to the power-on reset (por) that initializes the registers to their default state causing the outputs to be set low. this allows an easy and quick way to recon?gure all device registers to the same condition via software. 2. features n 16 led drivers. each output programmable at: u off u on u programmable led brightness u programmable led turn-on time to help reduce emi n 1 mhz fast-mode plus compatible i 2 c-bus interface with 30 ma high drive capability on sda output for driving high capacitive buses n 4096-step (12-bit) linear programmable brightness per led output varying from fully off (default) to maximum brightness n led output frequency (all leds) typically varies from 40 hz to 1000 hz (default of 1eh in pre_scale register results in a 200 hz refresh rate with oscillator clock of 25 mhz.) n sixteen totem pole outputs (sink 25 ma and source 10 ma at 5 v) with software programmable open-drain led outputs selection (default at totem pole). no input function. n output state change programmable on the acknowledge or the stop command to update outputs byte-by-byte or all at the same time (default to change on stop). n active low output enable ( oe) input pin. ledn outputs programmable to logic 1, logic 0 (default at power-up) or high-impedance when oe is high. n 6 hardware address pins allow 62 PCA9685 devices to be connected to the same i 2 c-bus n toggling oe allows for hardware led blinking n 4 software programmable i 2 c-bus addresses (one led all call address and three led sub call addresses) allow groups of devices to be addressed at the same time in any combination (for example, one register used for all call so that all the PCA9685s on the i 2 c-bus can be addressed at the same time and the second register used for three different addresses so that 1 3 of all devices on the bus can be addressed at the same time in a group). software enable and disable for these i 2 c-bus address. n software reset feature (swrst general call) allows the device to be reset through the i 2 c-bus
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 3 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller n 25 mhz typical internal oscillator requires no external components n external 50 mhz (max.) clock input n internal power-on reset n noise ?lter on sda/scl inputs n edge rate control on outputs n no output glitches on power-up n supports hot insertion n low standby current n operating power supply voltage range of 2.3 v to 5.5 v n 5.5 v tolerant inputs n - 40 c to +85 c operation n esd protection exceeds 2000 v hbm per jesd22-a114, 200 v mm per jesd22-a115 and 1000 v cdm per jesd22-c101 n latch-up testing is done to jedec standard jesd78 which exceeds 100 ma n packages offered: tssop28, hvqfn28 3. applications n rgb or rgba led drivers n led status information n led displays n lcd backlights n keypad backlights for cellular phones or handheld devices 4. ordering information [1] PCA9685pw/q900 is aec-q100 compliant. contact i2c.support@nxp.com for ppap. table 1. ordering information type number topside mark package name description version PCA9685pw PCA9685pw tssop28 plastic thin shrink small outline package; 28 leads; body width 4.4 mm sot361-1 PCA9685pw/q900 [1] PCA9685pw tssop28 plastic thin shrink small outline package; 28 leads; body width 4.4 mm sot361-1 PCA9685bs PCA9685bs hvqfn28 plastic thermal enhanced very thin quad ?at package; no leads; 28 terminals; body 6 6 0.85 mm sot788-1
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 4 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 5. block diagram remark: only one led output shown for clarity. fig 1. block diagram of PCA9685 a0 a1 a2 a3 a4 a5 002aac824 i 2 c-bus control input filter PCA9685 power-on reset scl sda v dd v ss led s tat e select register pwm register x brightness control mux/ control oe '0' C permanently off '1' C permanently on v dd ledn prescale 25 mhz oscillator clock switch extclk
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 5 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin con?guration for tssop28 fig 3. pin con?guration for hvqfn28 PCA9685pw PCA9685pw/q900 a0 v dd a1 sda a2 scl a3 extclk a4 a5 led0 oe led1 led15 led2 led14 led3 led13 led4 led12 led5 led11 led6 led10 led7 led9 v ss led8 002aac825 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 002aad236 PCA9685bs led11 led3 led4 led12 led2 led13 led1 led14 led0 led15 a4 oe a3 a5 led5 led6 led7 v ss led8 led9 led10 a2 a1 a0 v dd sda scl extclk transparent top view 7 15 6 16 5 17 4 18 3 19 2 20 1 21 8 9 10 11 12 13 14 28 27 26 25 24 23 22 terminal 1 index area table 2. pin description symbol pin type description tssop28 hvqfn28 a0 1 26 i address input 0 a1 2 27 i address input 1 a2 3 28 i address input 2 a3 4 1 i address input 3 a4 5 2 i address input 4 led0 6 3 o led driver 0 led1 7 4 o led driver 1 led2 8 5 o led driver 2 led3 9 6 o led driver 3 led4 10 7 o led driver 4 led5 11 8 o led driver 5 led6 12 9 o led driver 6 led7 13 10 o led driver 7 v ss 14 11 [1] power supply supply ground led8 15 12 o led driver 8 led9 16 13 o led driver 9 led10 17 14 o led driver 10 led11 18 15 o led driver 11
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 6 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller [1] hvqfn28 package die supply ground is connected to both v ss pin and exposed center pad. v ss pin must be connected to supply ground for proper device operation. for enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the pcb in the thermal pad region. [2] this pin must be grounded when this feature is not used. 7. functional description refer to figure 1 bloc k diag r am of PCA9685 . 7.1 device addresses following a start condition, the bus master must output the address of the slave it is accessing. there are a maximum of 64 possible programmable addresses using the 6 hardware address pins. two of these addresses, software reset and led all call, cannot be used because their default power-up state is on, leaving a maximum of 62 addresses. using other reserved addresses, as well as any other subcall address, will reduce the total number of possible addresses even further. 7.1.1 regular i 2 c-bus slave address the i 2 c-bus slave address of the PCA9685 is shown in figure 4 . to conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled high or low. remark: using reserved i 2 c-bus addresses will interfere with other devices, but only if the devices are on the bus and/or the bus will be open to other i 2 c-bus systems at some later date. in a closed system where the designer controls the address assignment these addresses can be used since the PCA9685 treats them like any other address. the led all call, software reset and pca9564 or pca9665 slave address (if on the bus) can never be used for individual device addresses. ? PCA9685 led all call address (1110 000) and software reset (0000 0110) which are active on start-up led12 19 16 o led driver 12 led13 20 17 o led driver 13 led14 21 18 o led driver 14 led15 22 19 o led driver 15 oe 23 20 i active low output enable a5 24 21 i address input 5 extclk 25 22 i external clock input [2] scl 26 23 i serial clock line sda 27 24 i/o serial data line v dd 28 25 power supply supply voltage table 2. pin description continued symbol pin type description tssop28 hvqfn28
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 7 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller ? pca9564 (0000 000) or pca9665 (1110 000) slave address which is active on start-up ? reserved for future use i 2 c-bus addresses (0000 011, 1111 1xx) ? slave devices that use the 10-bit addressing scheme (1111 0xx) ? slave devices that are designed to respond to the general call address (0000 000) which is used as the software reset address ? high-speed mode (hs-mode) master code (0000 1xx) the last bit of the address byte de?nes the operation to be performed. when set to logic 1 a read is selected, while a logic 0 selects a write operation. 7.1.2 led all call i 2 c-bus address ? default power-up value (allcalladr register): e0h or 1110 000x ? programmable through i 2 c-bus (volatile programming) ? at power-up, led all call i 2 c-bus address is enabled. PCA9685 sends an ack when e0h (r/ w = 0) or e1h (r/ w = 1) is sent by the master. see section 7.3.7 allcalladr, led all call i 2 c-b us address for more detail. remark: the default led all call i 2 c-bus address (e0h or 1110 000x) must not be used as a regular i 2 c-bus slave address since this address is enabled at power-up. all the PCA9685s on the i 2 c-bus will acknowledge the address if sent by the i 2 c-bus master. 7.1.3 led sub call i 2 c-bus addresses ? 3 different i 2 c-bus addresses can be used ? default power-up values: C subadr1 register: e2h or 1110 001x C subadr2 register: e4h or 1110 010x C subadr3 register: e8h or 1110 100x ? programmable through i 2 c-bus (volatile programming) ? at power-up, sub call i 2 c-bus addresses are disabled. PCA9685 does not send an ack when e2h (r/ w = 0) or e3h (r/ w = 1), e4h (r/ w = 0) or e5h (r/ w = 1), or e8h (r/ w = 0) or e9h (r/ w = 1) is sent by the master. see section 7.3.6 subadr1 to subadr3, i 2 c-b us subaddress 1 to 3 for more detail. remark: the default led sub call i 2 c-bus addresses may be used as regular i 2 c-bus slave addresses as long as they are disabled. fig 4. slave address r/w 002aad168 1 a5 a4 a3 a2 a1 a0 hardware selectable slave address fixed
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 8 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.1.4 software reset i 2 c-bus address the address shown in figure 5 is used when a reset of the PCA9685 needs to be performed by the master. the software reset address (swrst call) must be used with r/ w = logic 0. if r/ w = logic 1, the PCA9685 does not acknowledge the swrst. see section 7.6 softw are reset for more detail. remark: the software reset i 2 c-bus address is a reserved address and cannot be used as a regular i 2 c-bus slave address or as an led all call or led sub call address. 7.2 control register following the successful acknowledgement of the slave address, led all call address or led sub call address, the bus master will send a byte to the PCA9685, which will be stored in the control register. this register is used as a pointer to determine which register will be accessed. fig 5. software reset address 0 002aab416 0 0 0 0 0 1 1 r/w reset state = 00h remark: the control register does not apply to the software reset i 2 c-bus address. fig 6. control register 002aac826 d7 d6 d5 d4 d3 d2 d1 d0
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 9 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.3 register de?nitions table 3. register summary register # (decimal) register # (hex) d7 d6 d5 d4 d3 d2 d1 d0 name type function 0 00 00000000 mode1 read/write mode register 1 1 01 00000001 mode2 read/write mode register 2 2 02 00000010 subadr1 read/write i 2 c-bus subaddress 1 3 03 00000011 subadr2 read/write i 2 c-bus subaddress 2 4 04 00000100 subadr3 read/write i 2 c-bus subaddress 3 5 05 00000101 allcalladr read/write led all call i 2 c-bus address 6 06 00000110 led0_on_l read/write led0 output and brightness control byte 0 7 07 00000111 led0_on_h read/write led0 output and brightness control byte 1 8 08 00001000 led0_off_l read/write led0 output and brightness control byte 2 9 09 00001001 led0_off_h read/write led0 output and brightness control byte 3 10 0a 00001010 led1_on_l read/write led1 output and brightness control byte 0 11 0b 00001011 led1_on_h read/write led1 output and brightness control byte 1 12 0c 00001100 led1_off_l read/write led1 output and brightness control byte 2 13 0d 00001101 led1_off_h read/write led1 output and brightness control byte 3 14 0e 00001110 led2_on_l read/write led2 output and brightness control byte 0 15 0f 00001111 led2_on_h read/write led2 output and brightness control byte 1 16 10 00010000 led2_off_l read/write led2 output and brightness control byte 2 17 11 00010001 led2_off_h read/write led2 output and brightness control byte 3 18 12 00010010 led3_on_l read/write led3 output and brightness control byte 0 19 13 00010011 led3_on_h read/write led3 output and brightness control byte 1 20 14 00010100 led3_off_l read/write led3 output and brightness control byte 2 21 15 00010101 led3_off_h read/write led3 output and brightness control byte 3
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 10 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 22 16 00010110 led4_on_l read/write led4 output and brightness control byte 0 23 17 00010111 led4_on_h read/write led4 output and brightness control byte 1 24 18 00011000 led4_off_l read/write led4 output and brightness control byte 2 25 19 00011001 led4_off_h read/write led4 output and brightness control byte 3 26 1a 00011010 led5_on_l read/write led5 output and brightness control byte 0 27 1b 00011011 led5_on_h read/write led5 output and brightness control byte 1 28 1c 00011100 led5_off_l read/write led5 output and brightness control byte 2 29 1d 00011101 led5_off_h read/write led5 output and brightness control byte 3 30 1e 00011110 led6_on_l read/write led6 output and brightness control byte 0 31 1f 00011111 led6_on_h read/write led6 output and brightness control byte 1 32 20 00100000 led6_off_l read/write led6 output and brightness control byte 2 33 21 00100001 led6_off_h read/write led6 output and brightness control byte 3 34 22 00100010 led7_on_l read/write led7 output and brightness control byte 0 35 23 00100011 led7_on_h read/write led7 output and brightness control byte 1 36 24 00100100 led7_off_l read/write led7 output and brightness control byte 2 37 25 00100101 led7_off_h read/write led7 output and brightness control byte 3 38 26 00100110 led8_on_l read/write led8 output and brightness control byte 0 39 27 00100111 led8_on_h read/write led8 output and brightness control byte 1 40 28 00101000 led8_off_l read/write led8 output and brightness control byte 2 41 29 00101001 led8_off_h read/write led8 output and brightness control byte 3 table 3. register summary continued register # (decimal) register # (hex) d7 d6 d5 d4 d3 d2 d1 d0 name type function
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 11 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 42 2a 00101010 led9_on_l read/write led9 output and brightness control byte 0 43 2b 00101011 led9_on_h read/write led9 output and brightness control byte 1 44 2c 00101100 led9_off_l read/write led9 output and brightness control byte 2 45 2d 00101101 led9_off_h read/write led9 output and brightness control byte 3 46 2e 00101110 led10_on_l read/write led10 output and brightness control byte 0 47 2f 00101111 led10_on_h read/write led10 output and brightness control byte 1 48 30 00110000 led10_off_l read/write led10 output and brightness control byte 2 49 31 00110001 led10_off_h read/write led10 output and brightness control byte 3 50 32 00110010 led11_on_l read/write led11 output and brightness control byte 0 51 33 00110011 led11_on_h read/write led11 output and brightness control byte 1 52 34 00110100 led11_off_l read/write led11 output and brightness control byte 2 53 35 00110101 led11_off_h read/write led11 output and brightness control byte 3 54 36 00110110 led12_on_l read/write led12 output and brightness control byte 0 55 37 00110111 led12_on_h read/write led12 output and brightness control byte 1 56 38 00111000 led12_off_l read/write led12 output and brightness control byte 2 57 39 00111001 led12_off_h read/write led12 output and brightness control byte 3 58 3a 00111010 led13_on_l read/write led13 output and brightness control byte 0 59 3b 00111011 led13_on_h read/write led13 output and brightness control byte 1 60 3c 00111100 led13_off_l read/write led13 output and brightness control byte 2 61 3d 00111101 led13_off_h read/write led13 output and brightness control byte 3 table 3. register summary continued register # (decimal) register # (hex) d7 d6 d5 d4 d3 d2 d1 d0 name type function
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 12 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller [1] writes to pre_scale register are blocked when sleep bit is logic 0 (mode 1). [2] reserved. writes to this register may cause unpredictable results. remark: auto increment past register 69 will point to mode1 register (register 0). auto increment also works from register 250 to register 254, then rolls over to register 0. 62 3e 00111110 led14_on_l read/write led14 output and brightness control byte 0 63 3f 00111111 led14_on_h read/write led14 output and brightness control byte 1 64 40 01000000 led14_off_l read/write led14 output and brightness control byte 2 65 41 01000001 led14_off_h read/write led14 output and brightness control byte 3 66 42 01000010 led15_on_l read/write led15 output and brightness control byte 0 67 43 01000011 led15_on_h read/write led15 output and brightness control byte 1 68 44 01000100 led15_off_l read/write led15 output and brightness control byte 2 69 45 01000101 led15_off_h read/write led15 output and brightness control byte 3 ... reserved for future use 250 fa 11111010 all_led_on_l write/read zero load all the ledn_on registers, byte 0 251 fb 11111011 all_led_on_h write/read zero load all the ledn_on registers, byte 1 252 fc 11111100 all_led_off_l write/read zero load all the ledn_off registers, byte 0 253 fd 11111101 all_led_off_h write/read zero load all the ledn_off registers, byte 1 254 fe 11111110 pre_scale [1] read/write prescaler for output frequency 255 ff 11111111t estmode [2] read/write de?nes the test mode to be entered ... all further addresses are reserved for future use; reserved addresses will not be acknowledged. table 3. register summary continued register # (decimal) register # (hex) d7 d6 d5 d4 d3 d2 d1 d0 name type function
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 13 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.3.1 mode register 1, mode1 [1] when the auto increment ?ag is set, ai = 1, the control register is automatically incremented after a read or write. this allow s the user to program the registers sequentially. [2] it takes 500 m s max. for the oscillator to be up and running once sleep bit has been set to logic 0. timings on ledn outputs are not guaranteed if pwm control registers are accessed within the 500 m s window. there is no start-up delay required when using the extclk pin as the pwm clock. [3] no pwm control is possible when the oscillator is off. [4] when the oscillator is off (sleep mode) the ledn outputs cannot be turned on, off or dimmed/blinked. table 4. mode1 - mode register 1 (address 00h) bit description legend: * default value. bit symbol access value description 7 restart r shows state of restart logic. see section 7.3.1.1 for detail. w user writes logic 1 to this bit to clear it to logic 0. a user write of logic 0 will have no effect. see section 7.3.1.1 for detail. 0* restart disabled. 1 restart enabled. 6 extclk r/w to use the extclk pin, this bit must be set by the following sequence: 1. set the sleep bit in mode1. this turns off the internal oscillator. 2. write logic 1s to both the sleep and extclk bits in mode1. the switch is now made. the external clock can be active during the switch because the sleep bit is set. this bit is a sticky bit, that is, it cannot be cleared by writing a logic 0 to it. the extclk bit can only be cleared by a power cycle or software reset. extclk range is dc to 50 mhz. 0* use internal clock. 1 use extclk pin clock. 5 ai r/w 0* register auto-increment disabled [1] . 1 register auto-increment enabled. 4 sleep r/w 0 normal mode [2] . 1* low power mode. oscillator off [3] [4] . 3 sub1 r/w 0* PCA9685 does not respond to i 2 c-bus subaddress 1. 1 PCA9685 responds to i 2 c-bus subaddress 1. 2 sub2 r/w 0* PCA9685 does not respond to i 2 c-bus subaddress 2. 1 PCA9685 responds to i 2 c-bus subaddress 2. 1 sub3 r/w 0* PCA9685 does not respond to i 2 c-bus subaddress 3. 1 PCA9685 responds to i 2 c-bus subaddress 3. 0 allcall r/w 0 PCA9685 does not respond to led all call i 2 c-bus address. 1* PCA9685 responds to led all call i 2 c-bus address. refresh _ rate extclk 4096 pre scale 1 + () ------------------------------------------------------- =
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 14 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.3.1.1 restart mode if the PCA9685 is operating and the user decides to put the chip to sleep (setting mode1 bit 4) without stopping any of the pwm channels, the restart bit (mode1 bit 7) will be set to logic 1 at the end of the pwm refresh cycle. the contents of each pwm register are held valid when the clock is off. to restart all of the previously active pwm channels with a few i 2 c-bus cycles do the following steps: 1. read mode1 register. 2. check that bit 7 (restart) is a logic 1. if it is, clear bit 4 (sleep). allow time for oscillator to stabilize (500 m s). 3. write logic 1 to bit 7 of mode1 register. all pwm channels will restart and the restart bit will clear. remark: the sleep bit must be logic 0 for at least 500 m s, before a logic 1 is written into the restart bit. other actions that will clear the restart bit are: 1. power cycle. 2. i 2 c software reset command. 3. if the mode2 och bit is logic 0, write to any pwm register then issue an i 2 c-bus stop. 4. if the mode2 och bit is logic 1, write to all four pwm registers in any pwm channel. likewise, if the user does an orderly shutdown 1 of all the pwm channels before setting the sleep bit, the restart bit will be cleared. if this is done the contents of all pwm registers are invalidated and must be reloaded before reuse. an example of the use of the restart bit would be the restoring of a customers laptop lcd backlight intensity coming out of standby to the level it was before going into standby. 1. two methods can be used to do an orderly shutdown. the fastest is to write a logic 1 to bit 4 in register all_led_off_h. the other method is to write logic 1 to bit 4 in each active pwm channel ledn_off_h register.
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 15 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.3.2 mode register 2, mode2 [1] see section 7.7 using the PCA9685 with and without e xter nal dr iv ers for more details. normal leds can be driven directly in either mode. some newer leds include integrated zener diodes to limit voltage transients, reduce emi, protect the leds and these must be driven only in the open-drain mode to prevent overheating the ic. [2] change of the outputs at the stop command allows synchronizing outputs of more than one PCA9685. applicable to registers fro m 06h (led0_on_l) to 45h (led15_off_h) only. 1 or more registers can be written, in any order, before stop. [3] update on ack requires all 4 pwm channel registers to be loaded before outputs will change on the last ack. [4] see section 7.4 activ e lo w output enab le input for more details. 7.3.3 led output and pwm control the turn-on time of each led driver output and the duty cycle of pwm can be controlled independently using the ledn_on and ledn_off registers. there will be two 12-bit registers per led output. these registers will be programmed by the user. both registers will hold a value from 0 to 4095. one 12-bit register will hold a value for the on time and the other 12-bit register will hold the value for the off time. the on and off times are compared with the value of a 12-bit counter that will be running continuously from 0000h to 0fffh (0 to 4095 decimal). update on ack requires all 4 pwm channel registers to be loaded before outputs will change on the last ack. the on time, which is programmable, will be the time the led output will be asserted and the off time, which is also programmable, will be the time when the led output will be negated. in this way, the phase shift becomes completely programmable. the resolution for the phase shift is 1 4096 of the target frequency. t ab le 6 lists these registers. the following two examples illustrate how to calculate values to be loaded into these registers. table 5. mode2 - mode register 2 (address 01h) bit description legend: * default value. bit symbol access value description 7 to 5 - read only 000* reserved 4 invrt [1] r/w 0* output logic state not inverted. value to use when external driver used. applicable when oe = 0. 1 output logic state inverted. value to use when no external driver used. applicable when oe = 0. 3 och r/w 0* outputs change on stop command [2] . 1 outputs change on ack [3] . 2 outdrv [1] r/w 0 the 16 ledn outputs are con?gured with an open-drain structure. 1* the 16 ledn outputs are con?gured with a totem pole structure. 1 to 0 outne[1:0] [4] r/w 00* when oe = 1 (output drivers not enabled), ledn = 0. 01 when oe = 1 (output drivers not enabled): ledn = 1 when outdrv = 1 ledn = high-impedance when outdrv = 0 (same as outne[1:0] = 10) 1x when oe = 1 (output drivers not enabled), ledn = high-impedance.
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 16 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller example 1: (assumes that the led0 output is used and (delay time) + (pwm duty cycle) 100 %) delay time = 10 %; pwm duty cycle = 20 % (led on time = 20 %; led off time = 80 %). delay time = 10 % = 409.6 ~ 410 counts = 19ah. since the counter starts at 0 and ends at 4095, we will subtract 1, so delay time = 199h counts. led0_on_h = 1h; led0_on_l = 99h led on time = 20 % = 819.2 ~ 819 counts. off time = 4cch (decimal 410 + 819 - 1 = 1228) led0_off_h = 4h; led0_off_l = cch example 2: (assumes that the led4 output is used and (delay time) + (pwm duty cycle > 100 %) delay time = 90 %; pwm duty cycle = 90 % (led on time = 90 %; led off time = 10 %). delay time = 90 % = 3686.4 ~ 3686 counts - 1 = 3685 = e65h. led4_on_h = eh; led4_on_l = 65h led on time = 90 % = 3686 counts. since the delay time and led on period of the duty cycle is greater than 4096 counts, the ledn_off count will occur in the next frame. therefore, 4096 is subtracted from the ledn_off count to get the correct ledn_off count. see figure 9 , figure 10 and figure 11 . off time = 4cbh (decimal 3685 + 3686 = 7372 - 4096 = 3275) led4_off_h = 4h; led4_off_l = cbh fig 7. led output, example 1 0 stop example 1 ledn_on ledn_off 4095 0 819 1228 4095 0 4095 0 002aad812 819 1228 819 1228 819 1228 fig 8. led output, example 2 0 stop example 2 ledn_on ledn_off 4095 0 3686 4095 0 4095 0 002aad813 3275 3686 3275 3686
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 17 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller example 1: ledn_on < ledn_off example 2: ledn_on > ledn_off example 3: ledn_on[12] = 1; ledn_on[11:0] = 1022; ledn_off[12] = 0; ledn_off[11:0] = dont care example 4: ledn_on[12] = 0; ledn_off[12] = 0; ledn_on[11:0] = ledn_off[11:0] fig 9. output example 0 stop example 1 ledn_on ledn_off 4095 0 511 3071 511 3071 4095 0 511 3071 4095 0 ledn_on ledn_off 2047 2047 767 example 2 2047 767 002aad193 ledn_on example 3 ledn_on ledn_off example 4 1023 off 1023 1023
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 18 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller example 1: ledn_on unchanged and ledn_off decreased. example 2: ledn_on increased and ledn_off decreased. example 3: ledn_on made > ledn_off. example 4: ledn_off[12] set to 1. fig 10. update examples when ledn_on < ledn_off 0 stop example 1 ledn_on ledn_off 4095 0 511 3071 511 1023 4095 0 511 4095 0 ledn_on ledn_off 767 example 2 767 002aad194 ledn_on example 3 ledn_on ledn_off example 4 off register(s) updated in this cycle 511 3071 1023 511 3071 511 3071 1023 3071 1023 1023 ledn_off output(s) updated in this cycle
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 19 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller example 1: ledn_on unchanged and ledn_off decreased, but delay still > ledn_off example 2: ledn_on changed and ledn_off changed, but delay still > ledn_off example 3: ledn_on unchanged and ledn_off increased where ledn_on < ledn_off example 4: ledn_on[12] = 1 and ledn_off[12] changed from 0 to 1 fig 11. update examples when ledn_on > ledn_off 0 stop example 1 ledn_on ledn_off 4095 0 3071 1023 4095 0 511 4095 0 ledn_on ledn_off example 2 3413 002aad195 ledn_on example 3 ledn_on ledn_off example 4 off register(s) updated in this cycle 3071 1023 3071 ledn_off on 1023 output(s) updated in this cycle 3071 4095 0 511 3413 511 3071 3071 3413 3413
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 20 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller table 6. led_on, led_off control registers (address 06h to 45h) bit description legend: * default value. address register bit symbol access value description 06h led0_on_l 7:0 led0_on_l[7:0] r/w 0000 0000* ledn_on count for led0, 8 lsbs 07h led0_on_h 7:5 reserved r 000* non-writable 4 led0_on_h[4] r/w 0* led0 full on 3:0 led0_on_h[3:0] r/w 0000* ledn_on count for led0, 4 msbs 08h led0_off_l 7:0 led0_off_l[7:0] r/w 0000 0000* ledn_off count for led0, 8 lsbs 09h led0_off_h 7:5 reserved r 000* non-writable 4 led0_off_h[4] r/w 1* led0 full off 3:0 led0_off_h[3:0] r/w 0000* 0ah led1_on_l 7:0 led1_on_l[7:0] r/w 0000 0000* ledn_on count for led1, 8 lsbs 0bh led1_on_h 7:5 reserved r 000* non-writable 4 led1_on_h[4] r/w 0* led1 full on 3:0 led1_on_h[3:0] r/w 0000* ledn_on count for led1, 4 msbs 0ch led1_off_l 7:0 led1_off_l[7:0] r/w 0000 0000* ledn_off count for led1, 8 lsbs 0dh led1_off_h 7:5 reserved r 000* non-writable 4 led1_off_h[4] r/w 1* led1 full off 3:0 led1_off_h[3:0] r/w 0000* ledn_off count for led1, 4 msbs 0eh led2_on_l 7:0 led2_on_l[7:0] r/w 0000 0000* ledn_on count for led2, 8 lsbs 0fh led2_on_h 7:5 reserved r 000* non-writable 4 led2_on_h[4] r/w 0* led2 full on 3:0 led2_on_h[3:0] r/w 0000* ledn_on count for led2, 4 msbs 10h led2_off_l 7:0 led2_off_l[7:0] r/w 0000 0000* ledn_off count for led2, 8 lsbs 11h led2_off_h 7:5 reserved r 000* non-writable 4 led2_off_h[4] r/w 1* led2 full off 3:0 led2_off_h[3:0] r/w 0000* ledn_off count for led2, 4 msbs 12h led3_on_l 7:0 led3_on_l[7:0] r/w 0000 0000* ledn_on count for led3, 8 lsbs 13h led3_on_h 7:5 reserved r 000* non-writable 4 led3_on_h[4] r/w 0* led3 full on 3:0 led3_on_h[3:0] r/w 0000* ledn_on count for led3, 4 msbs 14h led3_off_l 7:0 led3_off_l[7:0] r/w 0000 0000* ledn_off count for led3, 8 lsbs 15h led3_off_h 7:5 reserved r 000* non-writable 4 led3_off_h[4] r/w 1* led3 full off 3:0 led3_off_h[3:0] r/w 0000* ledn_off count for led3, 4 msbs 16h led4_on_l 7:0 led4_on_l[7:0] r/w 0000 0000* ledn_on count for led4, 8 lsbs 17h led4_on_h 7:5 reserved r 000* non-writable 4 led4_on_h[4] r/w 0* led4 full on 3:0 led4_on_h[3:0] r/w 0000* ledn_on count for led4, 4 msbs
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 21 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 18h led4_off_l 7:0 led4_off_l[7:0] r/w 0000 0000* ledn_off count for led4, 8 lsbs 19h led4_off_h 7:5 reserved r 000* non-writable 4 led4_off_h[4] r/w 1* led4 full off 3:0 led4_off_h[3:0] r/w 0000* ledn_off count for led4, 4 msbs 1ah led5_on_l 7:0 led5_on_l[7:0] r/w 0000 0000* ledn_on count for led5, 8 lsbs 1bh led5_on_h 7:5 reserved r 000* non-writable 4 led5_on_h[4] r/w 0* led5 full on 3:0 led5_on_h[3:0] r/w 0000* ledn_on count for led5, 4 msbs 1ch led5_off_l 7:0 led5_off_l[7:0] r/w 0000 0000* ledn_off count for led5, 8 lsbs 1dh led5_off_h 7:5 reserved r 000* non-writable 4 led5_off_h[4] r/w 1* led5 full off 3:0 led5_off_h[3:0] r/w 0000* ledn_off count for led5, 4 msbs 1eh led6_on_l 7:0 led6_on_l[7:0] r/w 0000 0000* ledn_on count for led6, 8 lsbs 1fh led6_on_h 7:5 reserved r 000* non-writable 4 led6_on_h[4] r/w 0* led6 full on 3:0 led6_on_h[3:0] r/w 0000* ledn_on count for led6, 4 msbs 20h led6_off_l 7:0 led6_off_l[7:0] r/w 0000 0000* ledn_off count for led6, 8 lsbs 21h led6_off_h 7:5 reserved r 000* non-writable 4 led6_off_h[4] r/w 1* led6 full off 3:0 led6_off_h[3:0] r/w 0000* ledn_off count for led6, 4 msbs 22h led7_on_l 7:0 led7_on_l[7:0] r/w 0000 0000* ledn_on count for led7, 8 lsbs 23h led7_on_h 7:5 reserved r 000* non-writable 4 led7_on_h[4] r/w 0* led7 full on 3:0 led7_on_h[3:0] r/w 0000* ledn_on count for led7, 4 msbs 24h led7_off_l 7:0 led7_off_l[7:0] r/w 0000 0000* ledn_off count for led7, 8 lsbs 25h led7_off_h 7:5 reserved r 000* non-writable 4 led7_off_h[4] r/w 1* led7 full off 3:0 led7_off_h[3:0] r/w 0000* ledn_off count for led7, 4 msbs 26h led8_on_l 7:0 led8_on_l[7:0] r/w 0000 0000* ledn_on count for led8, 8 lsbs 27h led8_on_h 7:5 reserved r 000* non-writable 4 led8_on_h[4] r/w 0* led8 full on 3:0 led8_on_h[3:0] r/w 0000* ledn_on count for led8, 4 msbs 28h led8_off_l 7:0 led8_off_l[7:0] r/w 0000 0000* ledn_off count for led8, 8 lsbs 29h led8_off_h 7:5 reserved r 000* non-writable 4 led8_off_h[4] r/w 1* led8 full off 3:0 led8_off_h[3:0] r/w 0000* ledn_off count for led8, 4 msbs table 6. led_on, led_off control registers (address 06h to 45h) bit description continued legend: * default value. address register bit symbol access value description
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 22 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 2ah led9_on_l 7:0 led9_on_l[7:0] r/w 0000 0000* ledn_on count for led9, 8 lsbs 2bh led9_on_h 7:5 reserved r 000* non-writable 4 led9_on_h[4] r/w 0* led9 full on 3:0 led9_on_h[3:0] r/w 0000* ledn_on count for led9, 4 msbs 2ch led9_off_l 7:0 led9_off_l[7:0] r/w 0000 0000* ledn_off count for led9, 8 lsbs 2dh led9_off_h 7:5 reserved r 000* non-writable 4 led9_off_h[4] r/w 1* led9 full off 3:0 led9_off_h[3:0] r/w 0000* ledn_off count for led9, 4 msbs 2eh led10_on_l 7:0 led10_on_l[7:0] r/w 0000 0000* ledn_on count for led10, 8 lsbs 2fh led10_on_h 7:5 reserved r 000* non-writable 4 led10_on_h[4] r/w 0* led10 full on 3:0 led10_on_h[3:0] r/w 0000* ledn_on count for led10, 4 msbs 30h led10_off_l 7:0 led10_off_l[7:0] r/w 0000 0000* ledn_off count for led10, 8 lsbs 31h led10_off_h 7:5 reserved r 000* non-writable 4 led10_off_h[4] r/w 1* led10 full off 3:0 led10_off_h[3:0] r/w 0000* ledn_off count for led10, 4 msbs 32h led11_on_l 7:0 led11_on_l[7:0] r/w 0000 0000* ledn_on count for led11, 8 lsbs 33h led11_on_h 7:5 reserved r 000* non-writable 4 led11_on_h[4] r/w 0* led11 full on 3:0 led11_on_h[3:0] r/w 0000* ledn_on count for led11, 4 msbs 34h led11_off_l 7:0 led11_off_l[7:0] r/w 0000 0000* ledn_off count for led11, 8 lsbs 35h led11_off_h 7:5 reserved r 000* non-writable 4 led11_off_h[4] r/w 1* led11 full off 3:0 led11_off_h[3:0] r/w 0000* ledn_off count for led11, 4 msbs 36h led12_on_l 7:0 led12_on_l[7:0] r/w 0000 0000* ledn_on count for led12, 8 lsbs 37h led12_on_h 7:5 reserved r 000* non-writable 4 led12_on_h[4] r/w 0* led12 full on 3:0 led12_on_h[3:0] r/w 0000* ledn_on count for led12, 4 msbs 38h led12_off_l 7:0 led12_off_l[7:0] r/w 0000 0000* ledn_off count for led12, 8 lsbs 39h led12_off_h 7:5 reserved r 000* non-writable 4 led12_off_h[4] r/w 1* led12 full off 3:0 led12_off_h[3:0] r/w 0000* ledn_off count for led12, 4 msbs 3ah led13_on_l 7:0 led13_on_l[7:0] r/w 0000 0000* ledn_on count for led13, 8 lsbs 3bh led13_on_h 7:5 reserved r 000* non-writable 4 led13_on_h[4] r/w 0* led13 full on 3:0 led13_on_h[3:0] r/w 0000* ledn_on count for led13, 4 msbs table 6. led_on, led_off control registers (address 06h to 45h) bit description continued legend: * default value. address register bit symbol access value description
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 23 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller the ledn_on_h output control bit 4, when set to logic 1, causes the output to be always on. the turning on of the led is delayed by the amount in the ledn_on registers. ledn_off[11:0] are ignored. when this bit = 0, then the ledn_on and ledn_off registers are used according to their normal de?nition. the ledn_off_h output control bit 4, when set to logic 1, causes the output to be always off. in this case the values in the ledn_on registers are ignored. remark: when all led outputs are con?gured as always off, the prescale counter and all associated pwm cycle timing logic are disabled. if ledn_on_h[4] and ledn_off_h[4] are set at the same time, the ledn_off_h[4] function takes precedence. 3ch led13_off_l 7:0 led13_off_l[7:0] r/w 0000 0000* ledn_off count for led13, 8 lsbs 3dh led13_off_h 7:5 reserved r 000* non-writable 4 led13_off_h[4] r/w 1* led13 full off 3:0 led13_off_h[3:0] r/w 0000* ledn_off count for led13, 4 msbs 3eh led14_on_l 7:0 led14_on_l[7:0] r/w 0000 0000* ledn_on count for led14, 8 lsbs 3fh led14_on_h 7:5 reserved r 000* non-writable 4 led14_on_h[4] r/w 0* led14 full on 3:0 led14_on_h[3:0] r/w 0000* ledn_on count for led14, 4 msbs 40h led14_off_l 7:0 led14_off_l[7:0] r/w 0000 0000* ledn_off count for led14, 8 lsbs 41h led14_off_h 7:5 reserved r 000* non-writable 4 led14_off_h[4] r/w 1* led14 full off 3:0 led14_off_h[3:0] r/w 0000* ledn_off count for led14, 4 msbs 42h led15_on_l 7:0 led15_on_l[7:0] r/w 0000 0000* ledn_on count for led15, 8 lsbs 43h led15_on_h 7:5 reserved r 000* non-writable 4 led15_on_h[4] r/w 0* led15 full on 3:0 led15_on_h[3:0] r/w 0000* ledn_on count for led15, 4 msbs 44h led15_off_l 7:0 led15_off_l[7:0] r/w 0000 0000* ledn_off count for led15, 8 lsbs 45h led15_off_h 7:5 reserved r 000* non-writable 4 led15_off_h[4] r/w 1* led15 full off 3:0 led15_off_h[3:0] r/w 0000* ledn_off count for led15, 4 msbs table 6. led_on, led_off control registers (address 06h to 45h) bit description continued legend: * default value. address register bit symbol access value description
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 24 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.3.4 all_led_on and all_led_off control the all_led_on and all_led_off registers allow just four i 2 c-bus write sequences to ?ll all the on and off registers with the same patterns. the ledn_on and ledn_off counts can vary from 0 to 4095. the ledn_on and ledn_off count registers should never be programmed with the same values. because the loading of the ledn_on and ledn_off registers is via the i 2 c-bus, and asynchronous to the internal oscillator, we want to ensure that we do not see any visual artifacts of changing the on and off values. this is achieved by updating the changes at the end of the low cycle. 7.3.5 pwm frequency pre_scale the hardware forces a minimum value that can be loaded into the pre_scale register at 3. the pre_scale register de?nes the frequency at which the outputs modulate. the prescale value is determined with the formula shown in equation 1 : (1) where the update rate is the output modulation frequency required. for example, for an output frequency of 200 hz with an oscillator clock frequency of 25 mhz: (2) the pre_scale register can only be set when the sleep bit of mode1 register is set to logic 1. table 7. all_led_on and all_led_off control registers (address fah to feh) bit description legend: * default value. address register bit symbol access value description fah all_led_on_l 7:0 all_led_on_l[7:0] w only 0000 0000* ledn_on count for all_led, 8 msbs fbh all_led_on_h 7:5 reserved r 000* non-writable 4 all_led_on_h[4] w only 1* all_led full on 3:0 all_led_on_h[3:0] w only 0000* ledn_on count for all_led, 4 msbs fch all_led_off_l 7:0 all_led_off_l[7:0] w only 0000 0000* ledn_off count for all_led, 8 msbs fdh all_led_off_h 7:5 reserved r 000* non-writable 4 all_led_off_h[4] w only 1* all_led full off 3:0 all_led_off_h[3:0] w only 0000* ledn_off count for all_led, 4 msbs feh pre_scale 7:0 pre_scale[7:0] r/w 0001 1110* prescaler to program the output frequency prescale value round osc _ clock 4096 u pdate _ rate -------------------------------------------------- ? ?? 1 C = prescale value round 25 mhz 4096 200 -------------------------- - ? ?? 1 C 30 = =
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 25 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.3.6 subadr1 to subadr3, i 2 c-bus subaddress 1 to 3 subaddresses are programmable through the i 2 c-bus. default power-up values are e2h, e4h, e8h, and the device(s) will not acknowledge these addresses right after power-up (the corresponding subx bit in mode1 register is equal to 0). once subaddresses have been programmed to their right values, subx bits need to be set to logic 1 in order to have the device acknowledging these addresses (mode1 register). only the 7 msbs representing the i 2 c-bus subaddress are valid. the lsb in subadrx register is a read-only bit (0). when subx is set to logic 1, the corresponding i 2 c-bus subaddress can be used during either an i 2 c-bus read or write sequence. 7.3.7 allcalladr, led all call i 2 c-bus address the led all call i 2 c-bus address allows all the PCA9685s in the bus to be programmed at the same time (allcall bit in register mode1 must be equal to 1 (power-up default state)). this address is programmable through the i 2 c-bus and can be used during either an i 2 c-bus read or write sequence. the register address can also be programmed as a sub call. only the 7 msbs representing the all call i 2 c-bus address are valid. the lsb in allcalladr register is a read-only bit (0). if allcall bit = 0, the device does not acknowledge the address programmed in register allcalladr. table 8. subadr1 to subadr3 - i 2 c-bus subaddress registers 0 to 3 (address 02h to 04h) bit description legend: * default value. address register bit symbol access value description 02h subadr1 7:1 a1[7:1] r/w 1110 001* i 2 c-bus subaddress 1 0 a1[0] r only 0* reserved 03h subadr2 7:1 a2[7:1] r/w 1110 010* i 2 c-bus subaddress 2 0 a2[0] r only 0* reserved 04h subadr3 7:1 a3[7:1] r/w 1110 100* i 2 c-bus subaddress 3 0 a3[0] r only 0* reserved table 9. allcalladr - led all call i 2 c-bus address register (address 05h) bit description legend: * default value. address register bit symbol access value description 05h allcalladr 7:1 ac[7:1] r/w 1110 000* allcall i 2 c-bus address register 0 ac[0] r only 0* reserved
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 26 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.4 active low output enable input the active low output enable ( oe) pin, allows to enable or disable all the led outputs at the same time. ? when a low level is applied to oe pin, all the led outputs are enabled and follow the output state de?ned in the ledn_on and ledn_off registers with the polarity de?ned by invrt bit (mode2 register). ? when a high level is applied to oe pin, all the led outputs are programmed to the value that is de?ned by outne[1:0] in the mode2 register. the oe pin can be used as a synchronization signal to switch on/off several PCA9685 devices at the same time. this requires an external clock reference that provides blinking period and the duty cycle. the oe pin can also be used as an external dimming control signal. the frequency of the external clock must be high enough not to be seen by the human eye, and the duty cycle value determines the brightness of the leds. 7.5 power-on reset when power is applied to v dd , an internal power-on reset holds the PCA9685 in a reset condition until v dd has reached v por . at this point, the reset condition is released and the PCA9685 registers and i 2 c-bus state machine are initialized to their default states. thereafter, v dd must be lowered below 0.2 v to reset the device. table 10. led outputs when oe=1 outne1 outne0 led outputs 000 0 1 1 if outdrv = 1, high-impedance if outdrv = 0 1 0 high-impedance 1 1 high-impedance
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 27 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.6 software reset the software reset call (swrst call) allows all the devices in the i 2 c-bus to be reset to the power-up state value through a speci?c formatted i 2 c-bus command. to be performed correctly, it implies that the i 2 c-bus is functional and that there is no device hanging the bus. the swrst call function is de?ned as the following: 1. a start command is sent by the i 2 c-bus master. 2. the reserved swrst i 2 c-bus address 0000 000 with the r/ w bit set to 0 (write) is sent by the i 2 c-bus master. 3. the PCA9685 device(s) acknowledge(s) after seeing the general call address 0000 0000 (00h) only. if the r/ w bit is set to 1 (read), no acknowledge is returned to the i 2 c-bus master. 4. once the general call address has been sent and acknowledged, the master sends 1 byte with 1 speci?c value (swrst data byte 1): a. byte 1 = 06h: the PCA9685 acknowledges this value only. if byte 1 is not equal to 06h, the PCA9685 does not acknowledge it. if more than 1 byte of data is sent, the PCA9685 does not acknowledge any more. 5. once the correct byte (swrst data byte 1) has been sent and correctly acknowledged, the master sends a stop command to end the swrst call: the PCA9685 then resets to the default value (power-up value) and is ready to be addressed again within the speci?ed bus free time (t buf ). the i 2 c-bus master must interpret a non-acknowledge from the PCA9685 (at any time) as a swrst call abort. the PCA9685 does not initiate a reset of its registers. this happens only when the format of the swrst call sequence is not correct. fig 12. swrst call 0 0 0 0 0 0 0 a s 0 general call address start condition acknowledge from slave 002aac900 swrst data byte 1 a acknowledge from slave p stop condition 0000110 0
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 28 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 7.7 using the PCA9685 with and without external drivers the PCA9685 led output drivers are 5.5 v only tolerant and can sink up to 25 ma at 5 v. if the device needs to drive leds to a higher voltage and/or higher current, use of an external driver is required. ? invrt bit (mode2 register) can be used to keep the led pwm control ?rmware the same independently of the type of external driver. this bit allows led output polarity inversion/non-inversion only when oe=0. ? outdrv bit (mode2 register) allows minimizing the amount of external components required to control the external driver (n-type or p-type device). [1] when oe = 1, led output state is controlled only by outne[1:0] bits (mode2 register). [2] correct con?guration when leds directly connected to the ledn outputs (connection to v dd through current limiting resistor). [3] optimum con?guration when external n-type (npn, nmos) driver used. [4] optimum con?guration when external p-type (pnp, pmos) driver used. table 11. use of invrt and outdrv based on connection to the ledn outputs when oe=0 [1] invrt outdrv direct connection to ledn external n-type driver external p-type driver firmware external pull-up resistor firmware external pull-up resistor firmware external pull-up resistor 0 0 formulas and led output state values inverted led current limiting r [2] formulas and led output state values inverted required formulas and led output state values apply required 0 1 formulas and led output state values inverted led current limiting r [2] formulas and led output state values apply [3] not required [3] formulas and led output state values inverted not required 1 0 formulas and led output state values apply [2] led current limiting r formulas and led output state values apply required formulas and led output state values inverted required 1 1 formulas and led output state values apply [2] led current limiting r formulas and led output state values inverted not required formulas and led output state values apply [4] not required [4] invrt = 0 outdrv = 1 invrt = 1 outdrv = 1 invrt = 1 outdrv = 0 fig 13. external n-type driver fig 14. external p-type driver fig 15. direct led connection led0 +5 v 002aad169 led0 +5 v 002aad170 led0 +v dd 002aad171
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 29 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 8. characteristics of the i 2 c-bus the i 2 c-bus is for 2-way, 2-line communication between different ics or modules. the two lines are a serial data line (sda) and a serial clock line (scl). both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. data transfer may be initiated only when the bus is not busy. 8.1 bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see figure 16 ). 8.1.1 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low transition of the data line while the clock is high is de?ned as the start condition (s). a low-to-high transition of the data line while the clock is high is de?ned as the stop condition (p) (see figure 17 ). 8.2 system con?guration a device generating a message is a transmitter; a device receiving is the receiver. the device that controls the message is the master and the devices which are controlled by the master are the slaves (see figure 18 ). fig 16. bit transfer mba607 data line stable; data valid change of data allowed sda scl fig 17. de?nition of start and stop conditions mba608 sda scl p stop condition s start condition
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 30 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 8.3 acknowledge the number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. each byte of eight bits is followed by one acknowledge bit. the acknowledge bit is a high level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed must generate an acknowledge after the reception of each byte. also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. the device that acknowledges has to pull down the sda line during the acknowledge clock pulse, so that the sda line is stable low during the high period of the acknowledge related clock pulse; set-up time and hold time must be taken into account. a master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this event, the transmitter must leave the data line high to enable the master to generate a stop condition. fig 18. system con?guration 002aaa966 master transmitter/ receiver slave receiver slave transmitter/ receiver master transmitter master transmitter/ receiver sda scl i 2 c-bus multiplexer slave fig 19. acknowledgement on the i 2 c-bus 002aaa987 s start condition 9 8 2 1 clock pulse for acknowledgement not acknowledge acknowledge data output by transmitter data output by receiver scl from master
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 31 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 9. bus transactions (1) see t ab le 3 for register de?nition. fig 20. write to a speci?c register a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w acknowledge from slave 002aac829 data for register d[7:0] (1) d6 d5 d4 d3 d2 d1 d0 d7 control register a acknowledge from slave a acknowledge from slave p stop condition fig 21. write to all registers using the auto-increment feature; ai initially clear a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w 002aad187 mode1 register 0 0 0 0 0 0 0 0 control register = mode1 register a acknowledge from slave a acknowledge from slave p stop condition (cont.) (cont.) mode2 register a acknowledge from slave led15_off_l register a acknowledge from slave led15_off_h register a acknowledge from slave acknowledge from slave 1 ai bit set
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 32 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller fig 22. read all registers using the auto-increment feature; ai initially clear a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w 002aad188 mode1 register 0 0 0 0 0 0 0 0 control register = mode1 register a acknowledge from slave a acknowledge from slave p stop condition (cont.) (cont.) data from mode1 a acknowledge from master data from led15_off_h register a not acknowledge from master acknowledge from slave 1 ai bit set sr restart condition a5 a4 a3 a2 a1 a0 1 1 slave address r/w a acknowledge from slave data from mode2 a acknowledge from master fig 23. write to all_led_on and all_led_off registers using the auto-increment feature; ai initially set a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w 002aad189 all_led_on_l register 1 1 1 1 0 1 0 1 control register = all_led_on_l register a acknowledge from slave a acknowledge from slave p stop condition (cont.) (cont.) all_led_on_h register a acknowledge from slave all_led_off_l register a acknowledge from slave all_led_off_h register a acknowledge from slave acknowledge from slave fig 24. write to all_led_off_h to turn off all pwms a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w 002aad190 1 1 1 1 1 0 1 1 control register = all_led_off_h register a acknowledge from slave p stop condition acknowledge from slave 0 0 1 x x x x 0 all_led_off_h register a acknowledge from slave
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 33 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller (1) in this example, several PCA9685s are used and the same sequences (a) and (b) above are sent to each of them. (2) acknowledge from all the slave devices con?gured for the new led all call i 2 c-bus address in sequence (b). fig 25. led all call i 2 c-bus address programming and led all call sequence example a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w acknowledge from slave 002aad192 0 0 0 0 0 0 0 0 control register a acknowledge from slave mode1 register selection 0 1 0 0 1 1 1 0 data for mode1 register p stop condition a acknowledge from slave a5 a4 a3 a2 a1 a0 0 a s 1 slave address start condition r/w acknowledge from slave 0 0 0 0 1 0 1 0 control register a acknowledge from slave allcalladr register selection 0 1 0 1 0 1 x 1 new ledallcall i 2 c-bus address p stop condition a acknowledge from slave sequence (a) (1) sequence (b) (1) 0 1 0 1 0 1 0 a s 1 ledallcall i 2 c-bus address start condition r/w acknowledge (2) from all the devices configured for the new ledallcall i 2 c-bus address 1 1 1 1 0 1 0 1 control register a acknowledge (2) from slave all_led_on_l register selection 0 0 0 0 0 0 0 0 data for control register all_led_on_l p stop condition a acknowledge (2) from slave sequence (c) (cont.) (cont.) 0 0 0 0 0 0 0 a 0 0 0 0 0 0 0 0 0 a acknowledge (2) from slave data for all_led_off_l control register 0 0 0 1 0 0 0 0 a acknowledge (2) from slave all_led_on_h control register acknowledge (2) from slave ai on enable all call all_led_off_h
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 34 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 10. application design-in information i 2 c-bus address = 1010 101x. all 16 of the ledn outputs con?gurable as either open-drain or totem pole. mixing of con?guration is not possible. remark: set invrt = 0, outdrv = 1, outne = 01 (mode2 register bits) (1) resistor value should be chosen by referencing section 7 of um10204, i 2 c-bus speci?cation and user manual . (2) oe requires pull-up resistor if control signal from the master is open-drain. fig 26. typical application PCA9685 led0 led1 sda scl oe v dd = 2.5 v, 3.3 v or 5.0 v i 2 c-bus/smbus master 002aac827 sda scl (1) oe (1) led2 led3 a0 a1 a2 v dd a3 a4 a5 v ss 5 v 10 k w (2) 12 v led4 led8 led9 led10 led11 led12 led13 led14 led15 extclk 5 v 12 v led5 led6 led7 5 v 12 v 5 v 12 v
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 35 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller question 1: what kind of edge rate control is there on the outputs? ? the typical edge rates depend on the output con?guration, supply voltage, and the applied load. the outputs can be con?gured as either open-drain nmos or totem pole outputs. if the customer is using the part to directly drive leds, they should be using it in an open-drain nmos, if they are concerned about the maximum i ss and ground bounce. the edge rate control was designed primarily to slow down the turn-on of the output device; it turns off rather quickly (~1.5 ns). in simulation, the typical turn-on time for the open-drain nmos was ~14 ns (v dd = 3.6 v; c l = 50 pf; r pu = 500 w ). question 2: is ground bounce possible? ? ground bounce is a possibility, especially if all 16 outputs are changed at full current (25 ma each). there is a fair amount of decoupling capacitance on chip (~50 pf), which is intended to suppress some of the ground bounce. the customer will need to determine if additional decoupling capacitance externally placed as close as physically possible to the device is required. question 3: can i really sink 400 ma through the single ground pin on the package and will this cause any ground bounce problem due to the pwm of the leds? ? yes, you can sink 400 ma through a single ground pin on the package . although the package only has one ground pin, there are two ground pads on the die itself connected to this one pin. although some ground bounce is likely, it will not disrupt the operation of the part and would be reduced by the external decoupling capacitance. question 4: i cant turn the leds on or off, but their registers are set properly. why? ? check the mode1 register sleep (bit 4) setting. the bit needs to be 0 in order to enable the clocking. if both clock sources (internal osc and extclk) are turned off (bit 4 = 1), the leds cannot be dimmed or blinked. question 5: im using leds with integrated zener diodes and the ic is getting very hot. why? ? the ic outputs can be set to either open-drain or push-pull and default to push-pull outputs. in this application with the zener diodes, they need to be set to open-drain since in the push-pull architecture there is a low resistance path to gnd through the zener and this is causing the ic to overheat.
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 36 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller i 2 c-bus address = 1010 101x. remark: set invrt = 0, outdrv = 1, outne = 01 (mode2 register bits) for this con?guration. (1) resistor value should be chosen by referencing section 7 of um10204, i 2 c-bus speci?cation and user manual . (2) oe requires pull-up resistor if control signal from the master is open-drain. fig 27. lcd backlighting application PCA9685 led0 led1 sda scl oe v dd = 2.5 v, 3.3 v or 5.0 v asic/micro 002aac828 sda scl (1) oe (1) led2 led3 a0 a1 a2 v dd a3 a4 a5 v ss 10 k w (2) led4 led5 led6 led7 led8 led9 led10 led11 led12 led13 led14 led15 constant current switch mode regulator fb out v in i constant light sensor led supply r sense led string extclk
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 37 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 11. limiting values 12. static characteristics table 12. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage - 0.5 +6.0 v v i/o voltage on an input/output pin v ss - 0.5 5.5 v i o(ledn) output current on pin ledn - 25 ma i ss ground supply current - 400 ma p tot total power dissipation - 400 mw t stg storage temperature - 65 +150 c t amb ambient temperature operating - 40 +85 c table 13. static characteristics v dd = 2.3 v to 5.5 v; v ss =0v; t amb = - 40 cto+85 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit supply v dd supply voltage 2.3 - 5.5 v i dd supply current operating mode; no load; f scl = 1 mhz; v dd = 2.3 v to 5.5 v - 6 10 ma i stb standby current no load; f scl = 0 hz; v i =v dd or v ss ; v dd = 2.3 v to 5.5 v - 2.2 15.5 m a v por power-on reset voltage no load; v i =v dd or v ss [1] - 1.70 2.0 v input scl; input/output sda v il low-level input voltage - 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd - 5.5 v i ol low-level output current v ol = 0.4 v; v dd = 2.3 v 20 28 - ma v ol = 0.4 v; v dd = 5.0 v 30 40 - ma i l leakage current v i =v dd or v ss - 1- +1 m a c i input capacitance v i =v ss - 6 10 pf led driver outputs i ol low-level output current v ol = 0.5 v; v dd = 2.3 v to 4.5 v [2] 12 25 - ma i ol(tot) total low-level output current v ol = 0.5 v; v dd = 4.5 v [2] - - 400 ma i oh high-level output current open-drain; v oh =v dd - 10 - +10 m a v oh high-level output voltage i oh = - 10 ma; v dd = 2.3 v 1.6 - - v i oh = - 10 ma; v dd = 3.0 v 2.3 - - v i oh = - 10 ma; v dd = 4.5 v 4.0 - - v i oz off-state output current 3-state; v oh =v dd or v ss - 10 - +10 m a c o output capacitance - 5 8 pf
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 38 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller [1] v dd must be lowered to 0.2 v in order to reset part. [2] each bit must be limited to a maximum of 25 ma and the total package limited to 400 ma due to internal busing limits. address inputs; oe input; extclk v il low-level input voltage - 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd - 5.5 v i li input leakage current - 1- +1 m a c i input capacitance - 3 5 pf table 13. static characteristics continued v dd = 2.3 v to 5.5 v; v ss =0v; t amb = - 40 cto+85 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit fig 28. i dd typical values with osc on and f scl = 1 mhz versus temperature fig 29. i ol typical drive (ledn outputs) versus temperature fig 30. standby supply current versus temperature 002aad877 t amb ( c) - 50 100 50 0 4 6 2 8 10 i dd (ma) 0 v dd = 5.5 v 3.3 v 2.3 v - 50 100 50 0 002aad878 20 40 60 i ol (ma) 0 t amb ( c) v dd = 4.5 v 3.0 v 2.3 v 002aad879 t amb ( c) - 50 100 50 0 2 3 1 4 5 i stb ( m a) 0 v dd = 5.5 v 3.3 v 2.3 v
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 39 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 13. dynamic characteristics table 14. dynamic characteristics symbol parameter conditions standard-mode i 2 c-bus fast-mode i 2 c-bus fast-mode plus i 2 c-bus unit min max min max min max f scl scl clock frequency [1] 0 100 0 400 0 1000 khz f extclk frequency on pin extclk dc 50 dc 50 dc 50 mhz t buf bus free time between a stop and start condition 4.7 - 1.3 - 0.5 - m s t hd;sta hold time (repeated) start condition 4.0 - 0.6 - 0.26 - m s t su;sta set-up time for a repeated start condition 4.7 - 0.6 - 0.26 - m s t su;sto set-up time for stop condition 4.0 - 0.6 - 0.26 - m s t hd;dat data hold time 0 - 0 - 0 - ns t vd;ack data valid acknowledge time [2] 0.3 3.45 0.1 0.9 0.05 0.45 m s t vd;dat data valid time [3] 0.3 3.45 0.1 0.9 0.05 0.45 m s t su;dat data set-up time 250 - 100 - 50 - ns t low low period of the scl clock 4.7 - 1.3 - 0.5 - m s t high high period of the scl clock 4.0 - 0.6 - 0.26 - m s t f fall time of both sda and scl signals [4] [5] - 300 20 + 0.1c b [6] 300 - 120 ns t r rise time of both sda and scl signals - 1000 20 + 0.1c b [6] 300 - 120 ns t sp pulse width of spikes that must be suppressed by the input ?lter [7] - 50 - 50 - 50 ns t plz low to off-state propagation delay oe to ledn; outne[1:0] = 10 or 11 in mode2 register - 40 - 40 - 40 ns t pzl off-state to low propagation delay oe to ledn; outne[1:0] = 10 or 11 in mode2 register - 60 - 60 - 60 ns t phz high to off-state propagation delay oe to ledn; outne[1:0] = 10 or 11 in mode2 register - 60 - 60 - 60 ns
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 40 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller [1] minimum scl clock frequency is limited by the bus time-out feature, which resets the serial bus interface if either sda or s cl is held low for a minimum of 25 ms. disable bus time-out feature for dc operation. [2] t vd;ack = time for acknowledgement signal from scl low to sda (out) low. [3] t vd;dat = minimum time for sda data out to be valid following scl low. [4] a master device must internally provide a hold time of at least 300 ns for the sda signal (refer to the v il of the scl signal) in order to bridge the unde?ned region of scls falling edge. [5] the maximum t f for the sda and scl bus lines is speci?ed at 300 ns. the maximum fall time (t f ) for the sda output stage is speci?ed at 250 ns. this allows series protection resistors to be connected between the sda and the scl pins and the sda/scl bus lines without exceeding the maximum speci?ed t f . [6] c b = total capacitance of one bus line in pf. [7] input ?lters on the sda and scl inputs suppress noise spikes less than 50 ns. t pzh off-state to high propagation delay oe to ledn; outne[1:0] = 10 or 11 in mode2 register - 40 - 40 - 40 ns t plh low to high propagation delay oe to ledn; outne[1:0] = 01 in mode2 register - 40 - 40 - 40 ns t phl high to low propagation delay oe to ledn; outne[1:0] = 00 in mode2 register - 60 - 60 - 60 ns table 14. dynamic characteristics continued symbol parameter conditions standard-mode i 2 c-bus fast-mode i 2 c-bus fast-mode plus i 2 c-bus unit min max min max min max
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 41 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller fig 31. de?nition of timing t sp t buf t hd;sta p p s t low t r t hd;dat t f t high t su;dat t su;sta sr t hd;sta t su;sto sda scl 002aaa986 rise and fall times refer to v il and v ih . fig 32. i 2 c-bus timing diagram fig 33. t plz , t pzl and t phz , t pzh times scl sda t hd;sta t su;dat t hd;dat t f t buf t su;sta t low t high t vd;ack 002aab285 t su;sto protocol start condition (s) bit 7 msb (a7) bit 6 (a6) bit 1 (d1) bit 0 (d0) 1 / f scl t r t vd;dat acknowledge (a) stop condition (p) 002aad810 t plz t phz outputs disabled outputs enabled outputs enabled ledn output low-to-off off-to-low ledn output high-to-off off-to-high oe input v i v ol v oh v dd v m v m v x v y v m v ss t pzl t pzh v m v ss
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 42 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 14. test information r l = load resistor for ledn. c l = load capacitance includes jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generators. fig 34. test circuitry for switching times r l = load resistor for ledn. c l = load capacitance includes jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generators. test data are given in t ab le 15 . fig 35. test circuitry for switching times for enable/disable table 15. test data for enable/disable switching times test load switch c l r l t pd 50 pf 500 w open t plz , t pzl 50 pf 500 w v dd 2 t phz , t pzh 50 pf 500 w v ss pulse generator v o c l 50 pf r l 500 w 002aab880 r t v i v dd dut v dd open v ss pulse generator v o c l 50 pf r l 500 w 002aad811 r t v i v dd dut r l 500 w v dd 2 open v ss s1
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 43 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 15. package outline fig 36. package outline sot361-1 (tssop28) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 9.8 9.6 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.8 0.5 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot361-1 mo-153 99-12-27 03-02-19 0.25 w m b p z e 114 28 15 pin 1 index q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a d y 0 2.5 5 mm scale tssop28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm sot361-1 a max. 1.1
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 44 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller fig 37. package outline sot788-1 (hvqfn28) 0.65 1 a 1 e h bc unit y e references outline version european projection issue date iec jedec jeita mm 6.1 5.9 6.1 5.9 d h 4.25 3.95 y 1 4.25 3.95 e 1 3.9 e 2 3.9 0.35 0.25 0.05 0.00 0.2 0.05 0.1 dimensions (mm are the original dimensions) sot788-1 mo-220 - - - - - - 0.75 0.50 l 0.1 v 0.05 w 0 2.5 5 mm scale sot788-1 hvqfn28: plastic thermal enhanced very thin quad flat package; no leads; 28 terminals; body 6 x 6 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 814 28 22 21 15 7 1 x d e c b a e 2 02-10-22 terminal 1 index area terminal 1 index area a c c b v m w m note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) e (1)
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 45 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 16. handling information all input and output pins are protected against electrostatic discharge (esd) under normal handling. when handling ensure that the appropriate precautions are taken as described in jesd625-a or equivalent standards. 17. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 surface mount re?ow soldering description . 17.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electrical circuits. the soldered joint provides both the mechanical and the electrical connection. there is no single soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for ?ne pitch smds. re?ow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 17.2 wave and re?ow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. the re?ow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature pro?le. leaded packages, packages with solder balls, and leadless packages are all re?ow solderable. key characteristics in both wave and re?ow soldering are: ? board speci?cations, including the board ?nish, solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivity level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 17.3 wave soldering key characteristics in wave soldering are:
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 46 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller ? process issues, such as application of adhesive and ?ux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath speci?cations, including temperature and impurities 17.4 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 38 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 16 and 17 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 38 . table 16. snpb eutectic process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 3 350 < 2.5 235 220 3 2.5 220 220 table 17. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 47 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 18. abbreviations msl: moisture sensitivity level fig 38. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 18. abbreviations acronym description cdm charged-device model dut device under test emi electromagnetic interference esd electrostatic discharge hbm human body model i 2 c-bus inter-integrated circuit bus lcd liquid crystal display led light emitting diode lsb least signi?cant bit mm machine model msb most signi?cant bit nmos negative-channel metal-oxide semiconductor pcb printed-circuit board pmos positive-channel metal-oxide semiconductor por power-on reset pwm pulse width modulation; pulse width modulator rgb red/green/blue rgba red/green/blue/amber smbus system management bus
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 48 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 19. revision history table 19. revision history document id release date data sheet status change notice supersedes PCA9685_2 20090716 product data sheet - PCA9685_1 modi?cations: ? t ab le 1 order ing inf or mation : C added type number PCA9685pw/q900 C added t ab le note [1] ? figure 2 pin con? gur ation f or tssop28 : added type number PCA9685pw/q900 PCA9685_1 20080724 product data sheet - -
PCA9685_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 16 july 2009 49 of 50 nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller 20. legal information 20.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 20.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 20.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 20.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. i 2 c-bus logo is a trademark of nxp b.v. 21. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors PCA9685 16-channel, 12-bit pwm fm+ i 2 c-bus led controller ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 16 july 2009 document identifier: PCA9685_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 22. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 functional description . . . . . . . . . . . . . . . . . . . 6 7.1 device addresses . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.1 regular i 2 c-bus slave address . . . . . . . . . . . . . 6 7.1.2 led all call i 2 c-bus address . . . . . . . . . . . . . . 7 7.1.3 led sub call i 2 c-bus addresses . . . . . . . . . . . 7 7.1.4 software reset i 2 c-bus address . . . . . . . . . . . 8 7.2 control register . . . . . . . . . . . . . . . . . . . . . . . . . 8 7.3 register de?nitions . . . . . . . . . . . . . . . . . . . . . . 9 7.3.1 mode register 1, mode1 . . . . . . . . . . . . . . . . 13 7.3.1.1 restart mode . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.3.2 mode register 2, mode2 . . . . . . . . . . . . . . . . 15 7.3.3 led output and pwm control . . . . . . . . . . . . . 15 7.3.4 all_led_on and all_led_off control. . . 24 7.3.5 pwm frequency pre_scale . . . . . . . . . . . . 24 7.3.6 subadr1 to subadr3, i 2 c-bus subaddress 1 to 3 . . . . . . . . . . . . . . . . . . . . . . 25 7.3.7 allcalladr, led all call i 2 c-bus address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.4 active low output enable input . . . . . . . . . . . 26 7.5 power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 26 7.6 software reset. . . . . . . . . . . . . . . . . . . . . . . . . 27 7.7 using the PCA9685 with and without external drivers . . . . . . . . . . . . . . . . . . . . . . . . 28 8 characteristics of the i 2 c-bus. . . . . . . . . . . . . 29 8.1 bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8.1.1 start and stop conditions . . . . . . . . . . . . . 29 8.2 system con?guration . . . . . . . . . . . . . . . . . . . 29 8.3 acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 30 9 bus transactions . . . . . . . . . . . . . . . . . . . . . . . 31 10 application design-in information . . . . . . . . . 34 11 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 37 12 static characteristics. . . . . . . . . . . . . . . . . . . . 37 13 dynamic characteristics . . . . . . . . . . . . . . . . . 39 14 test information . . . . . . . . . . . . . . . . . . . . . . . . 42 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 43 16 handling information. . . . . . . . . . . . . . . . . . . . 45 17 soldering of smd packages . . . . . . . . . . . . . . 45 17.1 introduction to soldering. . . . . . . . . . . . . . . . . 45 17.2 wave and re?ow soldering . . . . . . . . . . . . . . . 45 17.3 wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 45 17.4 re?ow soldering. . . . . . . . . . . . . . . . . . . . . . . 46 18 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 47 19 revision history . . . . . . . . . . . . . . . . . . . . . . . 48 20 legal information . . . . . . . . . . . . . . . . . . . . . . 49 20.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 49 20.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 20.3 disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 49 20.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 49 21 contact information . . . . . . . . . . . . . . . . . . . . 49 22 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50


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